发明名称 Insulation groove manufacturing method for direct wafer bond substrate
摘要 The manufacturing method involves forming a lateral insulation groove (4) in a silicon/silicon dioxide/silicon substrate, provided by a crystalline silicon disc (1), a silicon dioxide dielectric insulation layer (2) and an on-type crystalline silicon layer (3). The latter layer is etched and the etched groove is fitted with a highly doped p-type polysilicon (5). The highly doped polysilicon is diffused into the sidewalls (6) of the groove, to provide diffusion regions (7) of opposite conductivity type. The silicon layer has a (110) crystal orientation and the isolation wet etched.
申请公布号 DE19728282(A1) 申请公布日期 1999.01.07
申请号 DE19971028282 申请日期 1997.07.02
申请人 SIEMENS AG, 80333 MUENCHEN, DE 发明人 TIHANYI, JENOE, DR.-ING., 85551 KIRCHHEIM, DE
分类号 H01L21/762;H01L21/84;(IPC1-7):H01L21/76;H01L21/86 主分类号 H01L21/762
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