| 摘要 |
<p>A semiconductor integrated circuit device which has a word line, a pair of bit lines, an information storing capacitor and an N-channel MOSFET whose gate is connected to the word line and which has a source/drain passage between one of the pair of bit lines and one of the terminals of the information storing capacitor on a semiconductor substrate and is operated on a positive power supply voltage and the ground potential of the circuit. A positive bias voltage higher than the ground potential of the circuit is generated and supplied to a P-type well region in which the MOSFET for the selection of the addresses of dynamic memory cells is formed as a bias voltage.</p> |
