Circuit arrangement for configuring peripheral units in data processing equipment

摘要

The circuit configures peripheral units coupled to a central processing unit via a bus system. An independent control unit (master) is arranged on a main board (motherboard) of the central processing unit. The control unit can be connected via two signal lines (15,17) to the bus system. The control unit can be initialised via a corresponding logic circuit and a software protocol. The logic circuit is an AND-gate or an OR-gate, for connecting the control unit to the individual peripheral units.