| 摘要 |
PROBLEM TO BE SOLVED: To improve the controllability of etching back of a side wall spacer by preventing the generation of the residue when an emitter electrode is formed by alleviating the steepness of the stepping on the circumference of a base electrode. SOLUTION: After formation of a MIS transistor, the first interlayer insulating layer 8, having the first aperture part 8a, is formed on the region which becomes the base of a bipolar transistor. The second aperture part 12b is formed in the first aperture part 8a by etching a conductive layer, which becomes the base electrode 12 formed on the first interlayer insulating layer 8, and the second interlayer insulating layer 13 (offset insulating layer). On the other hand, all the part outside the prescribed pattern is removed, and the base electrode 12 and the second interlayer insulating layer 13 are patterned. An insulating film is formed on the whole surface, side wall spacers 14 and 15 are formed in an excellent controllable manner on the outer circumferential wall and the inside wall of the base electrode 12 and the second interlayer insulating layer 13 using the time when the first interlayer insulating layer 8 is exposed as the end point of etching back, and after the outside stepping of the base electrode 12 has been alleviated, an emitter electrode 16 is formed. |
