Integrated memory device, e.g. synchronous DRAM

摘要

The device has data terminals (I/O, A) for reading data from memory cells of the memory and for writing data into memory cells. Also provided are address terminals for applying addresses to address the memory cells. At least some of the data terminals are combined terminals which are identical with at least some of the address terminals. For memory access the combined terminals serve first to apply address bits and then for data transmission. Preferably for each memory access, first an address is read in and then after a latent time a data transmission begins via the data terminals. The reading in of addresses and the data transmission may be controlled by a clock.