| 摘要 |
PROBLEM TO BE SOLVED: To achieve a technique for automatically realizing arrangement of parts or various sorts of constituent elements in an integrated circuit having a practical processing rate and accuracy. SOLUTION: A region divider 101 divides a part arranging region into a plurality of division regions on the basis of a region grain size. A part argument calculator 103 and a part rearranger 106, according to tables 104 and 105, extract a set of parts to be connected at respective wiring terminals and, when parts belonging to the part set are present in mutually different divided regions, modify arrangements of the parts in the divided regions in such a manner that a wiring length between the parts becomes small. A repetitive controller 107 repeats a series of such operations as mentioned above while arbitrarily changing a division starting position in the region dividing means. A region size modifier 108 repeats a series of operations mentioned so far while gradually decreasing the region size value each time the above series of operations are completed. An end judge 109 judges a processing end and outputs a part arrangement as an output result from the part arrangement table 105. |
