发明名称 ERRONEOUS WIRE-BONDING WIRING INSPECTION DEVICE
摘要 PROBLEM TO BE SOLVED: To make it possible to inspect an erroneous wire-bonding wiring on an IC chip accurately and rapidly by an image processing by a method wherein data on the position of a bonding point on a pad, data on the positions of wires, data on the positions of leads and data on the coordinate of a CAD, which is made out in the design of the IC chip, are used. SOLUTION: An IC chip is illuminated by an LED coaxial illuminator 5, an LED diffusion illuminator 6 and an LED transparent illuminator 7 and the chip is imaged by a CCD camera 8 from the surface thereof to make out data d1 on a bonding position on a pad, data d2 on the positions of wires and data d3 on the positions of leads 3. In an image processing unit 9; the data d1, the data d2 and the data d3 are led into the unit 9 and an erroneous wire-bonding wiring on the chip is inspected by an image processing using data d4 on the coordinate of a CAD, which is made out previously in the design of the chip, as reference data.
申请公布号 JPH10294342(A) 申请公布日期 1998.11.04
申请号 JP19970102057 申请日期 1997.04.18
申请人 NISSEI ENG KK 发明人 TOTOKI YASUYUKI
分类号 H01L21/60 主分类号 H01L21/60
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