发明名称 |
Clocking some elements of a circuit with leading edges of clock pulses and others with trailing edges |
摘要 |
A data processing circuit includes a first set of processing elements and a second set of processing elements. A clock provides common clocking signals to the processing elements, however, the first set of elements are clocked by rising edges of the clocking signals and the second set of elements are clocked by falling edges of the clocking signals. Circuitry is described for comparing the exponents of floating point numbers to enable normalisation. |
申请公布号 |
GB2323187(A) |
申请公布日期 |
1998.09.16 |
申请号 |
GB19970005295 |
申请日期 |
1997.03.14 |
申请人 |
* NOKIA MOBILE PHONES LIMITED;* NOKIA MOBILE PHONES LIMITED |
发明人 |
REBECCA * GABZDYL;BRIAN PATRICK * MCGOVERN |
分类号 |
G06F9/302;G06F9/38;(IPC1-7):G06F1/04;G06F5/01 |
主分类号 |
G06F9/302 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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