| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide the semiconductor memory capable of writing data with high accuracy without deteriorating its operating speed. SOLUTION: A memory cell transistor 30 and a reference transistor 31 have floating gates and control gates respectively. An electric potential of the floating gate of the reference transistor 31 is directly controllable by a fixed voltage (Vsig-dVsig) corresponding to a write data. The voltage Vsig is set to correspond to an electric charge to be injected into the floating gate of the memory cell transistor 30 by a write operation, while the voltage dVsig is set to correspond to a delay of the write operation by a write voltage generating circuit 32 and a comparator 34. Then, an electric potential Vp1 on the side of the transistor 30 and an electric potential Vp2 on the side of the transistor 31 are compared with each other by a comparator 34, and at the time when the potential Vp1 is dropped down to the potential Vp2, a write stopping signal WS is started up to stop supplying a voltage Vw.</p> |
