| 摘要 |
PROBLEM TO BE SOLVED: To enable high-speed signal processing without decelerating data processing because of bus competition by providing plural information processing units, which can communicate without interposing any bus, and executing processing through these information processing units. SOLUTION: Respective information processing units 10 are mutually connected and connected to a host memory bus 30. The respective information processing units 10 are directly arranged through a communication link 20 and communicate with the adjacent information processing units 10. By propagating communication contents from a certain information processing unit 10 to the next information processing unit 10, communication is enabled between arbitrary information processing units 10. Three information processing units 10 are shown for example but the number of units is not limited to three but arbitrary. Besides, the respective information processing units 10 are connected through a DRAM controller 19 to a host memory bus 30. Further, a host processor (CPU) 31 is connected to the host memory bus 30. |
