METHOD FOR OPERATING CACHE MEMORY AND COMPUTER SYSTEM

摘要

PROBLEM TO BE SOLVED: To enable caching operation having more predictive possibility to a processor for executing plural kinds of parallel processing by loading an item to an address definable position when the processor requests that item from a main memory during the execution of current processing. SOLUTION: When the real page number of address held on the address designated line of cache memory 22 is not coincident with a real page number supplied from an address translation buffer 10, an error signal is generated on a line 38 of exchange engine 30. The data item temporarily fetched from a main memory 6 is supplied through an exchange bus 32 to a cache access circuit 20 and loaded into a cache memory 22 together with the address of main memory 6. Since the data item itself is returned to a CPU as well, the CPU can continue execution. The data item called from the main memory 6 and its address are loaded at the first accessed storage positions.