| 摘要 |
<p>The circuit is designed to minimise complexity and cost. The design is also aimed at removing the effects on the intended delay due to the ageing of circuit components particularly preventing the reduction of delay time. The circuit includes a primary capacitor charged from a d.c. source via an adjustable resistance and an oscillator feeding into a shaping circuit providing pulses feeding the gate of a field effect transistor which itself controls the discharge of the primary capacitor. Oscillator control is provided by the d.c. potentiometer and coupling through the circuit elements is by transformer.</p> |
