发明名称 D flip-flop having asynchronous data loading
摘要 A flip-flop of the D type capable of loading data asynchronously and comprising two latches, a master and a slave one, connected in series with each other, is characterized in that each of these comprises an interface and selection circuit for input signals transferable in either the synchronous or the asynchronous manner, and a logic gate circuit which is input such signals and, in an asynchronous manner, control signals effective to establish the latch own states.
申请公布号 US5789957(A) 申请公布日期 1998.08.04
申请号 US19960706407 申请日期 1996.08.30
申请人 SGS-THOMSON MICROELECTRONICS, S.R.L. 发明人 FUCILI, GIONA;PAPILLO, LORENZO;PASQUINO, ANDREA;ROSSI, ANNAMARIA;GOLA, ALBERTO
分类号 H03K3/037;H03K3/3562;(IPC1-7):H03K3/289;H03K3/26 主分类号 H03K3/037
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