发明名称 CONTROL SYSTEM FOR MULTI-PROCESSOR SYSTEM
摘要 An input/output request control system in a multi-processor system includes a plurality of information processing modules (PM). The system comprises a plurality of input/output adapters (ADP) commonly used by each of said information processing modules and a plurality of input/output devices (DVC) divided into groups, each group controlled by one of two input/output adapters. An input/output request maintaining table (LDVC) manages input/output requests from respective information processing modules for each of the input/output devices controlled by said information processing modules by using a queue. Input/output requests from respective information processing modules are processed based on the state of the input/output request maintaining table and the input/output devices.
申请公布号 CA2037989(C) 申请公布日期 1998.07.28
申请号 CA19912037989 申请日期 1991.03.11
申请人 发明人 KIMURA, MAKOTO
分类号 G06F13/368;G06F13/42;G06F15/17;(IPC1-7):G06F13/20 主分类号 G06F13/368
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