Multiplier circuitry with improved storage and transfer of booth control coefficients

摘要

It is an object of the present invention to simplify a multiplier so as to reduce the circuit scale of a digital filter which uses a large number of multipliers. Outputs of a Booth decoder 4 are stored in registers 51-5(n+1)/2 provided corresponding to partial product generating circuits 1061-106(n+1)2. By providing control signals from the registers 51-5(n+1)/2 to the partial product generating circuits 1061-106(n+1)/2, the Booth decoder 4 is made common. The number of Booth decoders which have conventionally been provided in a one-to-one correspondence with the partial product generating circuits can be reduced to one and the multiplier can be simplified.