发明名称 PLL CIRCUIT AND PICTURE DISPLAY DEVICE USING THE SAME
摘要 PROBLEM TO BE SOLVED: To provide a PLL(phase locked loop) circuit capable of an oscillating signal having a frequency range equivalently broad by using dividers without broadening the frequency range of a VCO(voltage controlled oscillator). SOLUTION: The PLL circuit is composed of a phase comparator 10, a loop filter 20, a VCO and dividers 40 and 50. A control circuit 60 generates a control signal S60 for setting the dividing rate N of the divider 40 based on a reference signal Sref supplied to the PLL circuit, and the divider 40 N-divides an oscillating signal S0 from the VCO 30 and outputting a dividing signal SN to outside as the output signal of the PLL circuit. Then, the dividing signal SN is divided by the divider 50 having a fixed dividing rate M and supplying to the phase comparator 10. The phase comparator 10 generates a voltage signal S10 according to the result of the phase comparison, and controlling the oscillation frequency of the VCO 30 according to this. Thus, by changing the dividing rate N of the divider 40, an oscillating signal having a broader frequency range than the operational frequency range of the VCO 30 is obtained.
申请公布号 JPH10173518(A) 申请公布日期 1998.06.26
申请号 JP19960334191 申请日期 1996.12.13
申请人 SONY CORP 发明人 KOMATSU SADAHIRO
分类号 H04N5/12;G09G1/16;G09G5/12;H03L7/08 主分类号 H04N5/12
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