Device and method for incremental reading of a memory

摘要

The CPU (18) first memorises an address code in the address register (16) by which the cell reader selects the memory cells. The signals read are recorded in the reader register (26) and electronic transfer circuits (30), controlled by a signal (TRA) from the incrementer, store the contents of the reader register in the data register (28) for transfer to the CPU. A sequencing circuit (32) is controlled by CPU signals (ALE, ADV) and provides an incrementation signal (INC) to an address register (16). The new cells are read and transferred to the data register as before. The contents are transferred to the CPU if the next address code corresponds to the incremented address else the procedure returns to the beginning.