发明名称 Circuit layout technique with template-driven placement using fuzzy logic
摘要 A method for generating a physical integrated circuit layout, using the similarity between a template and the physical layout as a metric. This automated template-driven layout methodology creates a physical integrated circuit layout which approximates the specified template as closely as practicably possible. The similarity of the positioning of circuit elements in a physical layout is improved with regard to the positioning of those same circuit elements in a template. The circuit elements' placement is incrementally improved by attaching a cost to each placement, with a lower cost reflecting a better match between circuit element placement in the physical layout and the template. Fuzzy logic concepts are employed to determine the cost of a given layout.
申请公布号 US5768479(A) 申请公布日期 1998.06.16
申请号 US19960710359 申请日期 1996.09.17
申请人 CADENCE DESIGN SYSTEMS, INC. 发明人 GADELKARIM, GEORGE J.;VUCUREVICH, TED;KAO, WILLIAM H.
分类号 G06F17/50;(IPC1-7):G06F15/18 主分类号 G06F17/50
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