SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

摘要

A semiconductor integrated circuit device for high-speed data transfer, wherein wait control is eliminated to allow a logic circuit to access a DRAM during the self-refreshing period of the DRAM. The integrated circuit comprises a chip that includes a microcomputer incorporated with a CPU, memories and peripheral circuits, and a flash memory; and another chip that includes DRAMs and a logic circuit, such as an ASIC. The control of the DRAM depends on whether the DRAM is in the normal access period or in the self-refreshing period. In the DRAM self-refreshing period, the refreshing operations are canceled so that the logic circuit can access the DRAM when the logic circuit requests the access to the DRAM by using readout/write signals R/W.