发明名称 |
APPARATUS FOR AND METHOD OF REDUCING THE MEMORY BANDWIDTH REQUIREMENTS OF A SYSTOLIC ARRAY |
摘要 |
The invention is described in the context of a motion estimator within a video compression system but is applicable to other areas as well. The invention utilizes a plurality of processing elements (14-20) and FIFO arrays (22-28) arranged in a linear array to reduce the memory bandwidth required to process the data within the search window (30-36). Data from the search window is initially loaded into the processing elements and then rotated throughout in order to reduce memory accesses. In addition, the search window is traversed in a particular fashion so as to minimize the number of memory accesses required. |
申请公布号 |
CA2273868(A1) |
申请公布日期 |
1998.06.11 |
申请号 |
CA19972273868 |
申请日期 |
1997.12.01 |
申请人 |
ZAPEX TECHNOLOGIES (ISRAEL) LTD. |
发明人 |
FREIZEIT, AMIR;SPERLING, EREZ;SKALETZKY, GIL;HARLAP, MICHAL;STEINER, MOSHE |
分类号 |
H04N7/32;G06T9/00;H04N5/14;H04N7/26;(IPC1-7):H04N7/12;H04N11/04;H04N11/02 |
主分类号 |
H04N7/32 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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