发明名称 Method for manufacturing an integrated circuit
摘要 For manufacturing an integrated circuit, the production of a design for the circuit that comprises a plurality of MOS transistors is controlled by employment of a circuit simulator. <IMAGE> are calculated in the circuit simulator for the terminal nodes of the MOS transistors upon prescription of the voltages between gate and source Vgs, between drain and source Vds, and between the substrate and source Vbs in a consistent transistor model wherein drift, diffusion and short-channel effects are taken into consideration.
申请公布号 US5761082(A) 申请公布日期 1998.06.02
申请号 US19970799493 申请日期 1997.02.12
申请人 SIEMENS AKTIENGESELLSCHAFT 发明人 MIURA-MATTAUSCH, MITIKO
分类号 H01L21/8234;G06F17/50;H01L21/82;H01L27/088;(IPC1-7):G06F17/50 主分类号 H01L21/8234
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