| 摘要 |
The DMOS transistor described comprises an n drain region (11) a p body region (12) which forms, with the drain region (11), a junction having at least one edge portion (20) with a small radius of curvature, an n+ source region (13) which delimits a channel (16) in the body region (12), p+ body contact regions (14), a gate electrode (17), a source and body electrode (18) and a drain electrode (19). To prevent the "snap-back" phenomenon when the junction is reverse biased with the source, body and gate electrodes short-circuited, a p+ region (30) is associated with each of the edge portions (20) having a small radius of curvature and is arranged so as to be closer to the associated edge portion (20) than any part of the source region (13). <IMAGE> <IMAGE> |
