| 摘要 |
A microcomputer includes a plurality of register banks and a plurality of memory bank select registers coupled to the respective register banks. A register bank select register temporarily stores memory bank selection information. A bank select circuit is coupled to the register bank select register, which circuit decodes the memory bank selection information stored and selects one of the plurality of register banks and also one of the plurality of memory bank select registers. An address generating circuit is provided in the microcomputer for generating a memory address based on contents of the selected one register bank and the selected one memory bank select register, both selected by the bank select circuit. The memory address has the contents of the selected one register bank as lower-order bit contents and the contents of the selected one memory bank select register as higher-order bit contents. The memory bank selection information is saved in the register bank select register when an interruption request is issued and, new memory bank selection information is rewritten in the register bank select register. The bank select circuit responds to the new memory bank selection information and selects another register bank and another memory bank select register according to new selection information.
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