发明名称 Semiconductor memory device with fast successive read operation
摘要 A semiconductor memory device of the invention includes a memory cell array having a plurality of memory cells, row selector for selecting a row of the memory cell array corresponding to a row address of an input address, and column selector for selecting a plurality of columns of a memory cell array corresponding to a column address of an input address, and also selecting a plurality of columns of a memory cell array corresponding to at least one column address other than a column address of an input address. The device also includes a sense amplifier for sensing data stored in memory cells. The sense amplifier has at least two sense amplifier groups, the sense amplifier groups sensing data read from a plurality of memory cells corresponding to an input address, and data read from a plurality of memory cells corresponding to the row address of an input address and at least one other column address. The device has a page mode for rapidly switching and outputting data from a plurality of memory cells which have been read in parallel to sense amplifier in accordance with an input address.
申请公布号 US5748561(A) 申请公布日期 1998.05.05
申请号 US19960742338 申请日期 1996.11.01
申请人 SHARP KABUSHIKI KAISHA 发明人 HOTTA, YASUHIRO
分类号 G11C11/401;G11C7/10;G11C8/10;G11C8/12;G11C17/12;G11C17/18;(IPC1-7):G11C8/00 主分类号 G11C11/401
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