Low resistance, self-aligned, titanium silicide structures, using a single rapid thermal anneal procedure

摘要

A process for forming narrow polycide gate structures, using a low resistance, titanium silicide layer, has been developed. The process features initially forming a high resistance, titanium silicide layer, on exposed silicon regions, formed during the high temperature, PECVD titanium procedure. After deposition of a titanium nitride layer, used to protect the underlying high resistance, titanium silicide layer from a subsequent one step RTA anneal procedure, which is next performed [one step RTA anneal is then used] to convert the high resistance titanium silicide layer to a lower resistance titanium silicide layer. A composite insulator spacer is also used to reduce possible metal, or silicide bridging phenomena.