发明名称
摘要 PURPOSE:To reduce remarkably the number of operating bits in a PCM transmission line by decreasing a sampling period (t) to reduce the time error of a transmitted reference time pulse and coding the number of sampling pulses from a reference frame bit or a specific bit decided optionally. CONSTITUTION:A pulse counter circuit 14 starts the count of a clock pulse by a frame pulse of the PCM 1st order group and stops the count by using a reference time pulse signal (a). The stopped count value N is coded by a coding circuit 15, inserted in a designated channel location in the PCMd 1st order group frame constitution together with a program search code by a selection circuit 16 and a bit insertion circuit 13 and the result is transmitted to a line 5. The count value N is decoded by a pulse separation circuit 20, error correction circuit 21, program search code identification circuit 22 and a decoding circuit 23 from the received PCM primary group signal, supplied to a pulse count circuit 24 as count stop information and a pulse reproducing circuit 25 outputs a pulse with the same waveform as that of a transmission section input changed in the same timing as a counter circuit output pulse.
申请公布号 JPH0347792(B2) 申请公布日期 1991.07.22
申请号 JP19840142024 申请日期 1984.07.09
申请人 CHUBU DENRYOKU KK;FUJITSU KK 发明人 OZAKI MASAYA;HIBINO TSUYOSHI;SUZUKI SATOSHI;SAIDA SHINGO;SHIMOI KOICHI
分类号 H04J3/06;H04L5/22;H04L25/493 主分类号 H04J3/06
代理机构 代理人
主权项
地址