| 摘要 |
First and second slotlines (12, 14) are mounted on an electrically insulating substrate (16) having a planar face with a connection region (30). Each of the slotlines (12, 14) has first and second spaced-apart coplanar conductors (18, 20 and 32, 34) that extend into a connection region (30). A ground conductor (38), also mounted on the substrate face, is spaced from and coplanar with the first and second slotlines (12, 14) and has a proximal portion in the connection region (30). A chip circuit (28) includes first and second field-effect transistors (40, 42) flip mounted in the connection region (30) to all five conductors (18, 20, 32, 34, 38).
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