发明名称 |
High density wirebond chip interconnect for multi-chip modules |
摘要 |
The multi-chip module comprises a multi-layer substrate 102 and a patterned metallization layer formed on each layer of the substrate. A multi-tiered cavity is formed with an integrated circuit (IC) mounting surface at the bottom of the cavity. A plurality of ICs 101 are mounted on the IC mounting surface of the cavity. A first set of wire bonds 106 extends from at least one IC to the exposed portions of patterned metallization of at least two tiers of the multi-tiered cavity. A second set of wire bonds 105 extends from the at least one IC to bond pads of an adjacent IC. A third set of wire bonds 105 extends from the at least one IC to bond pads of the adjacent IC such that the third set of wire bonds has a higher loop height than the second set of wire bonds. |
申请公布号 |
GB2317743(A) |
申请公布日期 |
1998.04.01 |
申请号 |
GB19970011555 |
申请日期 |
1997.06.04 |
申请人 |
* HEWLETT-PACKARD COMPANY |
发明人 |
KENNETH * RUSH |
分类号 |
H01L25/00;H01L21/60;H01L23/52;H01L25/065 |
主分类号 |
H01L25/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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