发明名称 INTEGRATED COMPLIANT PROBE FOR WAFER LEVEL TEST AND BURN-IN
摘要 <p>The present invention is directed to a structure comprising a substrate having a surface; a plurality of elongated electrical conductors extending away from the surface; each of said elongated electrical conductors having a first end affixed to the surface and a second end projecting away from the surface; there being a plurality of second ends; and a means for maintaining the plurality of the second ends in substantially fixed positions with respect to each other. The structure is useful as a probe for testing and burning in integrated circuit chips at the wafer level.</p>
申请公布号 WO1998011446(A1) 申请公布日期 1998.03.19
申请号 US1997016265 申请日期 1997.09.12
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