| 摘要 |
PROBLEM TO BE SOLVED: To suppress the increase of the parasitic capacitance of a gate electrode of a semiconductor device and facilitate its high-speed operation. SOLUTION: Element isolating regions for separating a transistor forming region with a MOS transistor 10 from other element forming regions are provided. In each element isolation region, two or more grooves 1a are provided in a semiconductor substrate 1. The sidewall surfaces of an isolation and insulation layer 15 buried in the groove 1a and protruded upward from the principal surface of the semiconductor substrate 1 are continuous respectively with the sidewall surfaces of the groove 1a. On the surface of the interposed portion of the semiconductor substrate 1 between the two grooves 1a, laminated insulation layers 11, 13 are formed. The height of the top surface of the insulation layer 13 is substantially equal to the one of the insolation and insulation layer 15. |
