发明名称
摘要 PURPOSE:To avoid punch through between adjacent cells in a high density structure effectively and facilitate improvement of soft error resistant properties by providing impurity diffused layers which are brought into contact with lower electrodes of a capacitor through contact holes beforehand. CONSTITUTION:The surface of a substrate on which a MOS transistor is formed is covered with a CVD insulating film 6. Contact holes 7 (71 and 72) are drilled in the film 6 and lower electrodes 9 (91 and 92) of a capacitor which are brought into contact with n-type diffused layer 5 (51-53) are formed in the respective cells. Before the electrodes 9 are formed, boron ions are implanted through the contact holes 7 as p-type impurity ions to form p-type diffused layers 8 (81 and 82). The layers 8 are so formed as to pass the layers 5 along both the depth direction and lateral direction in the B-B' section. With this constitution, the layers 8 are more spread than the layers 5 along the lateral direction if it is observed between cells which are adjoining to the layers 8 along the work line direction. Therefore, a high punch through strength can be obtained even if the spacing between the cells are small. Moreover, the layers 8 formed more deeply than the layers 5 reduce the areas of the layers 5 so that soft error resistant properties can be improved.
申请公布号 JP2721167(B2) 申请公布日期 1998.03.04
申请号 JP19880018252 申请日期 1988.01.28
申请人 TOSHIBA KK 发明人 WATANABE HIDEHIRO;SAWADA SHIZUO;KUROSAWA AKIRA
分类号 H01L27/04;H01L21/822;H01L21/8242;H01L27/10;H01L27/108 主分类号 H01L27/04
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