发明名称 Method for verifying contiquity of a binary translated block of instructions by attaching a compare and/or branch instruction to predecessor block of instructions
摘要 A method for enabling a first block of instructions to verify whether the first block of instructions follows a second block of instructions in an order of execution. The method includes appending a compare instruction to the first block of instructions. The compare instruction compares a first value from the first block of instructions with a second value from the second block of instructions, which precedes the first block of instructions in the order of execution. The method further includes appending a branching instruction to the first block of instructions. The branching instruction is executed in response to the first value being unequal to the second value. The branching instruction, when executed, branches to an alternative look-up routine to obtain a block of instructions that follows the second block of instructions in the order of execution.
申请公布号 US5721927(A) 申请公布日期 1998.02.24
申请号 US19960689357 申请日期 1996.08.07
申请人 INTEL CORPORATION 发明人 BARAZ, LEONID;FARBER, YARON
分类号 G06F9/318;G06F9/38;G06F9/45;G06F9/455;G06F11/28;(IPC1-7):G06F9/32 主分类号 G06F9/318
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