| 发明名称 | Select gates with select gate dielectric first | ||
| 摘要 | A NAND flash memory includes a select transistor having a first region formed of a stack of layers on the substrate surface, and a second region that includes an opening through an interpoly dielectric layer, floating gate layer, and tunnel dielectric layer, the opening separated from the substrate surface by a select gate dielectric on the substrate surface, the opening filled by a control gate layer. | ||
| 申请公布号 | US9443862(B1) | 申请公布日期 | 2016.09.13 |
| 申请号 | US201514808463 | 申请日期 | 2015.07.24 |
| 申请人 | SanDisk Technologies LLC | 发明人 | Iwata Dai;Yoshida Yusuke;Yoshizawa Kazutaka |
| 分类号 | H01L29/02;H01L27/115;H01L21/28;H01L29/788;H01L29/66;H01L29/423 | 主分类号 | H01L29/02 |
| 代理机构 | Davis Wright Tremaine LLP | 代理人 | Davis Wright Tremaine LLP |
| 主权项 | 1. A NAND flash memory comprising: a plurality of floating gate memory cells disposed on a substrate surface, each of the plurality of floating gate memory cells formed of a stack of layers that includes a tunnel dielectric layer, a floating gate layer, an interpoly dielectric layer, and a control gate layer; and a plurality of select transistors disposed on the substrate surface, an individual select transistor having a first region formed of the stack of layers on the substrate surface, and a second region that includes an opening through the interpoly dielectric layer, the floating gate layer, and the tunnel dielectric layer, the opening separated from the substrate surface by a select gate dielectric on the substrate surface, the opening filled by the control gate layer. | ||
| 地址 | Plano TX US | ||