| 摘要 |
A method is for manufacturing a cache memory device for writing cache data into and reading cache data from a storing region of a memory cell array designated according to a portion of an address signal and a selection signal from a +E,fra 1/2+EE multiplexer. In a first step of the method, a common base of the +E,fra 1/2+EE multiplexer applicable to both a direct-map type cache memory device and a set-associative type cache memory device is manufactured. Then, in a second step of the method, one of the direct-map type cache memory device and the set-associative type cache memory device is manufactured using the common base of the +E,fra 1/2+EE multiplexer. The +E,fra 1/2+EE multiplexer included in the direct-map type cache memory device outputs another portion of the address signal as the selection signal, and the +E,fra 1/2+EE multiplexer included in the set-associative type cache memory device selectively outputs one of a write way signal and a read way signal as the selection signal according to a write enable signal.
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