| 摘要 |
In one embodiment, an integrated driver circuit configuration for an inductive load element includes a highly doped substrate of p-conductivity, an epitaxial layer having the same conductivity type as the substrate and being applied on the substrate, an output terminal for connecting the inductive load element, a plurality of insulated wells being disposed in the epitaxial layer and having a well associated with the output terminal, and an n-doped region laterally surrounding the well associated with the output terminal. In another embodiment, the integrated driver circuit configuration for the inductive load element includes a highly doped substrate of p-conductivity, an epitaxial layer applied on the substrate, a plurality of insulated wells having an n-doped well, an n-doped region laterally surrounding the n-doped well, and an output terminal for connecting the inductive load element. An npn transistor has an emitter formed by the n-doped well, a collector formed by the n-doped region, and a base formed by the epitaxial layer.
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