SINGLE CHIP FRAME BUFFER, FRAME BUFFER PRODUCED ON SINGLE CHIP DISPLAY SUB-SYSTEM, AND STRUCTURING METHOD OF FRAME BUFFER

摘要

PROBLEM TO BE SOLVED: To reduce memory space and address timing by setting the design and configuration of DRAM frame buffer memory in a specific structure. SOLUTION: CPU 101 decides the contents of graphic data to be displayed on a display unit 107. A display controller 104 executes the graphic function of the display unit 107, controlling a pixel data raster from a frame buffer 108 during the period of screen refresh, and interfacing CPU 101 and the frame buffer 108 while the display data is updated. At this time, the frame buffer 108 is structured as a device of 1.5 megabyte in a single package, thereby processing about 1.3 megabyte of ore-screen memory, which is required for the display of 1024×1280×8 bit/pixel, and 200 kilobyte of memory for icons.