Identification circuit for synchronising word in serial data stream

摘要

The processing circuit has a serial to parallel converter (11) to provide a parallel data synchronisation word, from the serial data, which is dependent upon a clock signal. This is fed to separation and equalisation stages 12,13 that separate identical values of the synchronising word and then produces a flag signal if the signal is recognised. A controller 14 identifies the input of the synchronisation word from the flag signal, and provides a control signal for the data processing stage. The data processor (15) uses the appropriate parallel signals from the converter, and the control signals, to produce an output.