| 摘要 |
PROBLEM TO BE SOLVED: To accelerate the operation by an arithmetic processor by enabling the start of operation before fixing the value of most significant bit(MSB) by performing the operation while using the logical invertion of input data, and selecting the arithmetic result corresponding to the value of MSB after the execution of operation. SOLUTION: Respective computing element groups 15-18 are provided with four inverter circuits 11 and four computing elements 12, further, the computing element groups 15-17 have four output selector circuits 14 and the computing element group 18 has four output selector circuits 13 respectively. Besides, in addition to this configuration, the computing element groups 16 and 17 have a selector circuit 1A and the computing element group 18 has a selector circuit 19. Then, when input data are negative in the case of finding the absolute value of complementary of '2', the result adding '1' to the logical invertion of input data found by the inverter circuit 11 at the computing element 12 is selected by the MSB of input data at the output selector circuit 13 and the arithmetic result is selected by the carry output of the low-order computing element group at the output selector circuit 14 so that the absolute value of input data can be provided. |
