| 摘要 |
<p>PROBLEM TO BE SOLVED: To minimize the system cost, increase the degree of freedom in wiring design within an interconnecting network, improve the signal transmission property, and improve the efficiency of interprocessor data transfer, by forming a processor portion and an interconnecting network portion using separate semiconductor chips, respectively, and unifying these portions in a COC structure. SOLUTION: A semiconductor device has a COC structure in which a PE chip 11 on the upper surface and an interconnecting network forming chip 13 on the lower surface are bonded, with active surfaces thereof facing each other. The junction between-the chips 11 and 13 is realized by connecting area electrode pads 16, 18 formed in the PE chip 11 and the interconnecting network forming chip 13 by a bump 17. Thus, the PE including a micro-processor and DSP, which is a constituent element, may be produced in the minimum possible size. Also, the latest process enables designing which emphasizes performance, thus enabling improvement in degree of freedom in designing.</p> |
