发明名称 Herstellungsverfahren für integrierte Schaltungschip Packung
摘要 A method of fabricating an integrated circuit chip package is provided in which a multi-chip module is formed by mounting a plurality of IC chips on a single silicon circuit board by means of flip-chip interconnection. Compared with a conventional multi-chip module in which, in order to obtain a uniform gap between IC chips and a silicon circuit board, metal bumps provided on both the silicon circuit board and the IC chips are used, such gap is defined in the present method by thicknesses of organic insulating films formed on both the IC chips and the circuit board. That is, height of metal bumps is selected such that it is smaller than a sum of the thicknesses of the insulating films and that closed spaces due to melting of solder for metal bump connection is prevented from being formed between the organic insulating films. <IMAGE> <IMAGE> <IMAGE>
申请公布号 DE69128014(D1) 申请公布日期 1997.11.27
申请号 DE1991628014 申请日期 1991.08.30
申请人 NEC CORP., TOKIO/TOKYO, JP 发明人 KUSAKA, TERUO, C/O NEC CORPORATION, MINATO-KU, TOKYO, JP
分类号 H01L21/60;H01L23/14;H01L23/538;H01L25/065;(IPC1-7):H01L21/60 主分类号 H01L21/60
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