DELAYING CIRCUIT USING LINEAR DEVICE

摘要

A delay circuit is provided to achieve uniform delay time irrelevant to the change of the power. The delay circuit is used negative voltage as substrate voltage of NMOS transistor. The delay circuit further includes a signal line having a linear resistor and a linear capacitor. The NMOS transistor comprises a gate used as resistor component and a source/drain provided to negative voltage. By using the NMOS transistor as a linear device, it is possible to achieve uniform delay time irrelevant to the change of the negative voltage.