| 摘要 |
The present invention relates to a method of pre-reading and pre-decoding of instructions of a microprocessor, which allows each of all instructions to be executed within a single cycle without being influenced by the instructions such as jump, etc. This is achieved mainly by, at the same time that an instruction is executed, pre-reading next two instructions and deciding if the first one of the next two instructions is a call, jump or conditional instruction, in order to change the value of the program counter of the microprocessor before the completion of the execution of said instruction, thereby eliminating the time-consuming phenomenon caused by said change of the value of the program counter and rasing the processing speed in the microprocessor. A structure for the pre-reading of the next two instructions is also disclosed in the present invention.
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