| 摘要 |
A circuit that is easily configured to convert from a progressive scan image, e.g., at a resolution of 1280 x 720, to an interlaced image scan, e.g., at an interlaced resolution of 1920 x 1080 (1920 x 540 per field), or vice-versa. One arrangement of the circuit employs multiplexers so that the two conversion modes share the available hardware. The circuit is only marginally more complex than a circuit that can only do the conversion in one direction. The quality of the progressive-to-interlace conversion is acceptable for high-end interlaced display systems and the quality of the interlace-to-progressive conversion is at least high enough for "mid-range" progressive display systems.
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