发明名称 Apparatus and method for a memory unit with a processor integrated therein
摘要 A smart memory (10) is provided that includes data storage (12 and 18) and a processing core (14 and 16) for executing instructions stored in the data storage area (12 and 18). Externally, smart memory (10) is directly accessible as a standard memory device. In a first mode of operation, the smart memory (10) is a data storage facility for an associated central processing unit (22). In a second mode of operation, the smart memory (10) is a storage facility for the processing core (14 and 16) and for central processing unit (22) for simultaneous execution of instructions. The central processing unit (22) controls the mode of operation and determines the instructions executed by the processing core (14 and 16). The wide data bus, available with an integrated processor/storage facility, permits certain processing operations to be off-loaded to the smart memory (10) where the processing operations can be performed more efficiently.
申请公布号 US5678021(A) 申请公布日期 1997.10.14
申请号 US19940324291 申请日期 1994.10.17
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 PAWATE, BASAVARAJ I.;POTEET, KENNETH A.;NEAL, JOE H.
分类号 G06F15/78;(IPC1-7):G06F13/16;G06F12/00 主分类号 G06F15/78
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