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发明名称
MEMORY SUB-SYSTEM, MEMORY DEVICE, PROCESSING SYSTEM AND ACCESS METHOD
摘要
申请公布号
JPH09251421(A)
申请公布日期
1997.09.22
申请号
JP19960322039
申请日期
1996.12.02
申请人
SHIIRASU LOGIC INC
发明人
JII AARU MOHAN RAO
分类号
G06F12/10;G06F12/02;G06F12/06;G11C8/12;G11C11/401;G11C11/407;G11C11/408;G11C11/41;G11C11/413;(IPC1-7):G06F12/06
主分类号
G06F12/10
代理机构
代理人
主权项
地址
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