摘要 |
PROBLEM TO BE SOLVED: To effectively stores an internel arithmetic operation processing time by generating a selection control signal with a prescribed time belay so as to apply time division processing to input data corresponding to an external control input including a clock signal in synchronism with the clock signal via a prescribed count processing. SOLUTION: Corresponding to control inputs including a selection control signalϕ2fs and clock signals CLK1 , CLK2 received externally, a counter circuit 7 counts the latch use clock signals CLK1 , CLK2 . Thus, a selection control signalϕ2fs ' in synchronism with the clock signals with a prescribed time delay is generated and given to selector circuits 1, 6. Thus, even when there exists any dispersion in the skew of the selection control signal and the clock signals received externally, no error is caused in input data and a register circuit 5 latches data at the trailing of the clock signal. Thus, an arithmetic circuit 2 ensures a sufficient arithmetic time to attain high speed arithmetic processing.
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