| 摘要 |
<p>A microprocessor is provided which executes instructions specifying incrementation of a source operand in addition to the operation defined by the instructions. Several embodiments of the microprocessor are shown which include hardware for performing the increments. Loops of instructions which increment a register to access new operands within successive loop iterations may be performed more efficiently. Fewer instructions may be included within the loop by specifying increments within an instruction which performs another function (for example, a load of the operands). Having fewer instructions within the loop may lead to fewer execution units being used to execute an iteration of the loop. Subsequent iterations of the loop or instructions subsequent to the loop may be executed in the execution units not used by the more efficient loop. Therefore, performance of the microprocessor and of a computer system employing the microprocessor may be increased.</p> |
