发明名称 PARUSUHATSUSEIKAIRO
摘要 PURPOSE:To protect other field effect transistors(FETs) connected in parallel with any of FETs by destroying the FET when an overvoltage takes place. CONSTITUTION:The voltage of a main capacitor 4 charged with a high voltage is fed to a load in a prescribed timing by a switching means 8 composed of FETs 9 of series and parallel connection. Then a series circuit composed a Zener diode 11 and a diode 12 is connected between the relevant gate and the drain of the FETs 9 whose gate is disconnected from the other gate in each stage of series connection and a resistor 13 is connected between the gate and a source. Thus, even when an overvoltage is applied to the FET 9, the prescribed FET 9 is conductive forcedly and destroyed according to the dynamic clamper characteristic. Thus, the further increase in the overvoltage is suppressed.
申请公布号 JP2648378(B2) 申请公布日期 1997.08.27
申请号 JP19900034251 申请日期 1990.02.15
申请人 MITSUBISHI DENKI KK 发明人 IWATA AKIHIKO;ITO HIROSHI;TABATA YOICHIRO;EGURI SHIGEO;UEDA YOSHIHIRO
分类号 H01S3/097;H02M9/04;H03K3/57;(IPC1-7):H03K3/57 主分类号 H01S3/097
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