| 摘要 |
PROBLEM TO BE SOLVED: To provide a frame synchronization circuit of a 1-bit shifting system capable of shortening the worst synchronization establishment time. SOLUTION: In a frame synchronization pattern comparator circuit 21, synchronization pattern data are generated, input data signals are searched and frame detection pulses are outputted to synchronization reproducing circuits 22 and 23 at the detection timing. In the respective synchronization reproducing circuits 22 and 23, frame pulses are respectively generated while mutually shifting phases, the matching/non-matching of the frame pulses and the frame detection pulses are judged, shifting equivalent to one bit is performed when the frame pulses are shifted from the judged result and synchronization establishment signals are outputted to a priority circuit 24 together with the frame pulses when they match. The priority circuit 24 outputs the frame pulses of the synchronization reproducing circuit for which the most prior synchronization establishement signals are obtained as frame synchronization signals. |
