发明名称 VOLTAGE FEED METHOD OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <p>PROBLEM TO BE SOLVED: To obtain a semiconductor integrated circuit device which includes MOS transistors and is low in power consumption and capable of operating at a high speed even if the MOS transistors are micronized in size by a method wherein a first voltage is applied to the first power supply wire of a semiconductor logic circuit in an active state, and a second voltage is applied to the first power supply wire in a sleep state. SOLUTION: A semiconductor integrated circuit device operates on a on a first voltage VCH and a second voltage 0 as operating voltages and is provided with source/drain paths between first power supply wires P1 , to Pj ,k and a second power wire. Semiconductor logic circuis B1 ,1 to Bj ,k include MOS transistors where a leakage current flows between the drain and source of each of them even if a gate voltage is equal to a source voltage are provided. A second voltage 0 is fed to the second power supply wire of the semiconductor device, the first voltage VCH is fed to the first power supply wires P1 ,1 to Pj ,k in an active state, and the second voltage 0 is fed to them in a sleep state. By this setup, all flowing current can be reduced nearly to the flowing current of the single semiconductor logic circuit.</p>
申请公布号 JPH09219496(A) 申请公布日期 1997.08.19
申请号 JP19970037388 申请日期 1997.02.21
申请人 HITACHI LTD 发明人 SAKATA TAKESHI;ITO KIYOO;HORIGUCHI SHINJI
分类号 G11C11/413;G11C11/407;G11C11/418;G11C16/06;H01L21/82;H01L21/822;H01L27/04;H01L27/10;H03K19/0948;(IPC1-7):H01L27/04 主分类号 G11C11/413
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